DOA bus
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Revision as of 04:35, 13 November 2008 by WikiAdmin (Talk | contribs) (New page: = Digital Out Type A (DOA) Bus = == Electrical Layer Interface == This is a unidirectional multidrop bus. Data flows only in one direction: from the PHCC motherboard to the DOA daughterb...)
Digital Out Type A (DOA) Bus
Electrical Layer Interface
This is a unidirectional multidrop bus. Data flows only in one direction: from the PHCC motherboard to the DOA daughterboards, all connected daughterboards see the data at the same time. It is a synchronous two wire bus, one data and one clock line.
Transmission Layer Interface
Each daughterboard has a 8bit long address, this means that with the current implementation, up to 256 daughterboards could theoretically be connected to DOA. Repeaters/signal conditioners should be used with longer cables and for every few daughterboards. The protocol is called AP2PP, Addressable PIC to PIC Protocol. AP2PP code for the receiving side (daugherboards) is available for several different PIC microcontrollers. The code and protocol is very simple. Bits are serially transmitted, LSB first. Data gets latched in at the positive (low-to-high) going transition of the clk.
The current clock speed on the DOA bus is TBD.